Syntacore Releases SCR1 — Open Source IP for the Embedded Use
Syntacore, a founding member of the RISC-V Foundation and IP and tools specialist, is excited to announce its new open-source SCR1 core, designed for general-purpose, deeply embedded applications and control systems.
Key features:
- Open sourced under SHL-license, allowing unrestricted commercial use
- Full compatibility with the RISC-V open ISA
- Support for RV32I|E[MC] ISA
- In-order 2–4 stage pipeline
- Support for the machine privilege mode
- On-chip TCM unit
- Interrupt subsystem, featuring the IPIC unit
- AHB-Lite, AXI4, JTAG interfaces support
- Advanced debug controller with the JTAG interface
- Hardware triggers support
- 3 predefined configurations
- Verification suite and extensive documentation
Full RTL, supplementary collateral and FPGA-based SDKs are available in the GitHub repository.
SCR1 is suitable for industrial, internet of things (IoT), storage devices, smart meters, smart home, and automotive applications. Feel free to contact our experts for more details and technical advice.