Inaugural RISC-V Summit Proceedings
Syntacore participates in the RISC-V Summit, scheduled for December 3–6 in Santa-Clara, California.
Our colleagues deliver a session “New 64GC IP in the SCRx Family of the RISC-V-Compatible Cores by Syntacore”, featuring our RISC-V IP portfolio, ranging from embedded to high-performance cores as well as our new 64-bit IP product line, including a new application-class SCR7 core. You're also invited to visit our booth in the exhibition area for product demonstrations.
Join us at the event.