2-nd RISC-V Meeting, Paris 2019
Syntacore, a RISC-V IP and tools expert, is a part of the RISC-V conference, scheduled for October 1–3 in Paris, France.
During the event, our experts deliver a session “Open-source Processor IP in the SCRx family of the RISC-V-compatible Cores”, featuring a range of cores from an open-source microcontroller SCR1 core to application-class SCR7 core, as well as our RISC-V software development tools.
Join us at the event