RISC-V Summit San Francisco 2021

RISC-V Summit at Moscone West, San Francisco, December 6-8, 2021

Syntacore, a leading RISC-V IP and tools specialist, takes part in the RISC-V Summit, scheduled for December 6–8 at Moscone West in San Francisco. This event offers a combination of in-person and virtual participation, allowing a worldwide audience to engage and connect.

Syntacore provides a technical session: “RISC-V-compatible Processor IP by Syntacore: Compact Open-source MCU to Multicore Linux”, covering our current portfolio of RISC-V-compatible IP, ranging from microcontroller to application-class cores. The session also introduces a new MCU-class SCR6 core and offers a sneak peek at the upcoming entry-level, server-class core. Another session, "Debian Linux at Octacore SCR7-based SDK", features an online demonstration of an application, running on Debian, utilizing a multicore SCR7 cluster, accompanied by tests and comparative benchmark data.

We invite everyone interested in learning more about our company and products to join us online and at the booth B9 in the Expo Hall. To schedule a meeting with Syntacore at the RISC-V Summit, contact info@syntacore.com

See you at our booth and online.