Your innovations with RISC-V

Flexible, customizable, silicon-proven RISC-V cores and tools

RISC-V is the new industry standard for computing

The open and flexible RISC-V ISA standard is developing thanks to a large number of companies involved the in RISC-V International organization. The mission of the organization is to create a unified processor architecture standard for all classes of devices, from embedded microcontrollers to server processors. RISC-V has already proven its viability in some areas. Forecasts show that RISC-V will be in more than 16 billion SoCs by 2030 with CAGR 40%.

Syntacore, a founding member of RISC-V International, offers a state-of-the-art RISC-V IP portfolio. We have successfully implemented a variety of projects for different applications which proves the flexibility and potential of our products and ultimately characterizes Syntacore as a reliable partner and expert.

Compact, energy-efficient, high-performance cores with real-time capabilities optimized for extremely low power consumption
Industrial Automation
High-performance, power-efficient, Linux-capable cores and multicore clusters with floating-point support
Power-efficient, high-performance, and compact-size cores for storage systems from entry-level to high-end class
Cores for embedded and microcontroller-class applications with excellent performance and power efficiency
High-performance cores with an advanced interconnect and a high-throughput memory subsystem, which supports multicore configurations and memory coherency
AI and ML
Cores that address data-intense AI and ML workloads with support for hardware accelerators and vector operations
Multicore clusters and cores with up to 3 levels of cache, cluster coherency, virtualization, and hypervisor support. Optimized for power-efficient and high-performance applications
PC and Laptops
High-performance, multi-cluster, coherent, and heterogenous configurations with up to 16 cores, hypervisor, Linux and AOSP, and vector operations support
High-performance, high-throughput cores with a rich memory subsystem, support for multicore configurations, and Linux